Lorans Hirmez

Electrical and Hardware Engineer
Systems integration, validation and test

San Diego, CA

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About

I am an electrical and hardware engineer in San Diego with 5+ years across R&D hardware and regulated manufacturing, taking embedded electronic products from prototype to production. At E-Seek I bring up and debug PCBAs, validate systems with RF, analog, digital and power measurements, and led ISO 10373 certification of the M600 scanner by redesigning its RF module for Cetecom BSI testing.

I build the tooling that makes testing repeatable: MATLAB workflows that capture instrument data, compare builds and generate reports, so failures that cross the hardware, firmware and software boundary get isolated quickly. I am completing an M.S. in Electrical Engineering at San Diego State University (expected May 2028) and moving deeper into PCBA and hardware design.

Experience

R&D Hardware Engineer

E-Seek, Inc. · San Diego, CA · Apr 2022 – Present

  • Led ISO 10373 certification of the M600 scanner by redesigning its RF module so the product could pass Cetecom BSI certification testing.
  • Plan and run electrical, functional, regression, reliability, environmental and design-verification tests on embedded scanner systems: PCB assemblies, power circuitry, CMOS imaging, LED illumination, firmware and communications interfaces.
  • Bring up, characterize and rework PCBAs using schematics, oscilloscopes, logic analyzers, spectrum analyzers, VNAs and signal generators, with controlled experiments to confirm each fix.
  • Built MATLAB workflows that automate instrument data capture, analysis, regression comparison and reporting.
  • Root-cause failures spanning analog, digital, RF, power, signal integrity, sensors, imaging, optics and hardware-software interactions.
  • Write test plans, procedures, acceptance criteria, fixtures and defect reports, and recommend corrective actions to electrical, firmware, software, mechanical, quality and manufacturing teams.

Production Lead

Cue Health · San Diego, CA · Nov 2020 – Apr 2022

  • Led daily production of regulated diagnostic products and PCB assemblies, enforcing controlled procedures, traceability, inspection requirements and safety.
  • Supported automated-equipment troubleshooting, defect review, escalation and corrective action to keep a high-volume line running.

Education

M.S., Electrical Engineering (in progress)

San Diego State University Global Campus · Expected May 2028

Power and hardware test
Power Electronics; VLSI Testing
Networks and sensing
Wireless Sensor Networks; High Speed Networks (in progress)
Data and ML
Machine Learning for Engineers

B.S., Electrical Engineering

San Diego State University · May 2020

Analog and power
Fundamentals of Engineering Electronics and Lab; Analysis and Design of Electronic Circuits and Electronic Circuits Lab; Electrical Energy Conversion and Lab
RF and microwave
Electromagnetic Waves; Antenna Theory and Design; Microwave Devices and Systems
Digital and embedded
Digital Systems; Computer Organization; Embedded Systems Programming; VLSI Circuit Design
Signals and communications
Signals and Systems; Digital Signal Processing; Feedback Control Systems; Analog and Pulse Communication Systems and Communications & DSP Lab
Capstone
Senior Design A and B

FPGA Logic Design and Verification (training)

Northrop Grumman · Eight weeks

Xilinx Vivado, VHDL and Verilog: implemented digital functions and verification testbenches.

Projects

Dual Power Generation prototype with vertical-axis wind turbine and solar panel, next to the system block diagram

Dual Power Generation: Wind and Solar (Senior Design)

Team of 11 (EE 496A/B, San Diego State, advised by Dr. Chris Mi) that built a hybrid renewable generator: a vertical-axis wind turbine with a solar panel on top, feeding a battery through AC-DC, DC-DC buck/boost and DC-AC conversion stages. I led the software group building the maximum power tracker (Raspberry Pi with an IR tachometer on the rotor, logging to a database), designed the DC-DC and DC-AC converters, and built the solar panel's sun-tracking maneuvering system (stepper motor, linear actuator and photoresistors).

Power electronics · Converters · Maximum power tracking · Raspberry Pi · Embedded systems

Simulink model of a 350 kW EV charger and simulated grid phase voltage and current

Ultra-Fast EV Charging System (350 kW)

Built a MATLAB/Simulink model of a 350 kW DC fast charger: grid, active-front-end rectifier, buck-boost DC-DC stage and a 100 kWh battery with a lumped thermal model. Implemented a CC-CP-CV charging controller and compared liquid, refrigerant and phase-change-material cooling, plus an economic feasibility analysis.

MATLAB · Simulink · Power electronics · Thermal modeling · EE584

Layouts of a 2-input XOR gate in standard CMOS, pseudo-NMOS and pass-transistor logic

CMOS vs Pseudo-NMOS vs Pass-Transistor XOR

Designed, laid out and simulated a 2-input XOR in three logic families (TSMC 0.3 µm, 3.3 V, 50 fF load, DRC and LVS clean) and extracted area, power and delay. Pass-transistor logic was smallest (176 µm²) and lowest power (0.005 mW); pseudo-NMOS was fastest (4.48 ns) but drew 0.337 mW from its always-on pull-up. Repeated the comparison on a 4-bit parity checker. Team project.

Cadence Virtuoso · Layout · DRC/LVS · Power-delay-area trade-offs

Layouts of static CMOS NAND and NOR gates

Static CMOS Gates and Voltage-Temperature Variation

Sized and laid out NAND (80 µm²) and NOR (73 µm²) gates matched to a reference inverter, then measured propagation delay across 0, 27 and 65 °C and 90%, 100% and 110% of VDD. Also optimized a chain of inverters for minimum delay. Team project.

Cadence · Transistor sizing · PVT corners · Propagation delay

NMOS and PMOS I-V characteristic plots from SPICE simulation

MOSFET I-V Extraction and Inverter Design

Extracted threshold voltage (NMOS 408 mV, PMOS 300 mV) and transconductance parameters from simulated I-V curves, measured the body-bias effect at Vbs = ±0.5 V, and sized a CMOS inverter (PMOS 1.35 µm, NMOS 450 nm) to center the switching threshold near VDD/2. Our team was awarded extra credit for achieving the fastest propagation delay.

Cadence Spectre · SPICE modeling · Device characterization

LTspice bridge rectifier schematic with load current waveform

Diode Modeling and Rectifier Circuits (EE330)

Imported a manufacturer SPICE model for the BAV70LT1G diode into LTspice, compared simulated and datasheet forward voltage, and checked half-wave and full-wave rectifier hand calculations (done in MATLAB) against simulation. Added filter capacitors to hold output ripple under the 100 mV requirement (about 81 mV half-wave, 74 mV full-wave). Team project.

LTspice · MATLAB · Rectifiers · Datasheet analysis

LTspice schematics of op-amp, common-source MOSFET and common-emitter BJT inverting amplifiers

Inverting Amplifiers: Op-Amp, MOSFET and BJT (EE330)

Designed three inverting amplifiers from one spec (18 V supply, gain of -65 or better, 30 mV / 10 kHz input, 20 kΩ load) using an AD824 op-amp, a Si7336ADP common-source MOSFET and a 2N2222A common-emitter BJT. Extracted device parameters from DC sweeps (NMOS Vtn 2.16 V, gm 5.1 mS; BJT α 0.995, β 199), tuned bias networks for low THD and low supply current, and built a Digi-Key parts and cost table. Team project.

LTspice · Analog design · THD and Fourier analysis · Biasing

Skills

Design and EDA
Altium Designer, OrCAD, PADS, KiCad, Cadence, LTspice, PSpice
Test and measurement
Oscilloscopes, logic analyzers, spectrum analyzers, VNAs, signal generators, DMMs, power supplies
Software and scripting
MATLAB, Simulink, Python, Git, Jira; C/C++, LabVIEW and Linux familiarity
Digital design
Xilinx Vivado, VHDL, Verilog
Interfaces
SPI, I2C, CAN, USB, UART, TCP/IP
Hands-on
PCB assembly, soldering and rework; reliability and environmental testing

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